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description the ILX526A is a rectangular reduction type ccd linear image sensor designed for bar code pos hand scanner and optical measuring equipment use. a built-in timing generator and clock-drivers ensure single 5v power supply for easy use. features number of effective pixels: 3000 pixels pixel size: 7m 200m (7m pitch) single 5v power supply high sensitivity: 300v/(lx ?s) built-in timing generator and clock-drivers built-in sample-and-hold circuit electrical shutter function clock frequency: 100khz (min), 1mhz (max) absolute maximum ratings supply voltage v dd 6v operating temperature ?0 to +60 ? storage temperature ?0 to +80 ? pin configuration (top view) internal structure ?1 ILX526A e97803-ps 3000-pixel ccd linear image sensor (b/w) sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 12 13 14 15 16 17 18 19 20 21 22 2 3 4 5 6 7 8 9 10 11 1 1 3000 s/hsw gnd v dd nc nc nc nc nc v out gnd v dd nc t1 v dd gnd f shut f rog nc nc nc f clk vgg a a clock-drivers ccd analog shift register readout gate readout gate ccd analog shift register clock-drivers clock pulse generator readout gate pulse generator shutter pulse generator d24 d25 d54 d55 s1 s2 s3 s2999 s3000 d56 d65 1 21 22 14 13 9 8 7 6 2 10 12 20 output amplifier s/h circuit f shut f rog f clk t1 s/hsw vgg gnd v dd v dd gnd v dd gnd v out 22 pin dip (cer-dip)
?2 ILX526A pin description pin no. symbol description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 vgg f clk nc nc nc f rog f shut gnd v dd t1 nc s/hsw gnd v dd nc nc nc nc nc v out gnd v dd output circuit gate bias clock pulse input nc nc nc readout gate pulse input electrical shutter pulse input gnd 5v test nc switch (with s/h or without s/h) gnd 5v nc nc nc nc nc signal output gnd 5v recommended voltage item v dd min. 4.5 mode description mode in use with s/h without s/h 12 pin s/hsw gnd v dd typ. 5.0 max. 5.5 unit v input pin capacity symbol c f clk c f rog c f rog min. typ. 10 10 10 max. unit pf pf pf item input capacity of f clk pin input capacity of f rog pin input capacity of f shut pin
?3 ILX526A electro-optical characteristics (note 1) ta = 25?, v dd = 5v, clock frequency: 500khz, light source = 3200k, ir cut filter: cm-500s (t = 1.0mm), without s/h mode item symbol min. typ. max. unit remarks sensitivity 1 sensitivity 2 sensitivity nonuniformity saturation output voltage dark voltage average dark signal nonuniformity image lag dynamic range saturation exposure 5v current consumption total transfer efficiency output impedance offset level r1 r2 prnu v sat v drk dsnu il dr se i vdd tte z o v os 210 0.6 92.0 300 3700 5.0 0.8 2.5 5.0 5.0 320 0.003 7.0 97.0 250 2.5 390 10.0 6.0 12.0 17.0 v/(lx ?s) v/(lx ?s) % v mv mv % lx ?s ma % v note 2 note 3 note 4 note 5 note 6 note 7 note 8 note 9 note 10 note) 1. in accordance with the given electrooptical characteristics, the even black level is defined as the average value of d24, d26 to d52. the odd black level is defined as the average value of d25 , d27 to d53. 2. for the sensitivity test light is applied with a uniform intensity of illumination. 3. light source: led l = 660nm 4. prnu is defined as indicated below. ray incidence conditions are the same as for note 2. prnu = 100 [%] where the 3000 pixels are divided into blocks of even and odd pixels, respectively, the maximum output of each block is set to v max , the minimum output to v min and the average output to v ave . 5. integration time is 10ms. 6. the difference between the maximum and average values of the dark output voltage is calculated for even and odd respectively. integration time is 10ms. 7. typical value is used for clock pulse and readout pulse. v out = 500mv. 8. dr = when optical integration time is shorter, the dynamic range sets wider because dark voltage is in proportion to optical integration time. 9. se = 10. vos is defined as indicated below. (v max ?v min )/2 v ave v sat v drk v sat r1 aa aa v out gnd d52 d53 d51 d55 s1 d54 v os aaa aaa aaa aaa
?4 ILX526A d63 f rog f clk v out 5 0 5 0 d0 d1 d2 d3 d4 d21 d22 d23 d24 d54 d55 s1 s2 s3 d53 s2997 s2998 s2999 s3000 d56 d57 d58 d59 d60 d61 optical black (30 pixels) dummy signal (55 pixels) ? 0 1 2 d62 d64 d65 f shut 5 0 effective picture elements signal (3000 pixels) 1-line output period (3066 pixels) s4 dummy signal (10 pixels) 3100 or more clock pulses are required. clock timing diagram (with s/h mode)
?5 ILX526A d0 d1 d2 d3 d4 d21 d22 d23 d24 d54 d55 s1 s2 s3 d52 s2997 s2998 s2999 s3000 d56 d57 d58 d59 d60 d61 ? 0 1 2 d62 d63 d64 d65 d53 f rog f clk v out 5 0 5 0 f shut 5 0 optical black (30 pixels) dummy signal (55 pixels) effective picture elements signal (3000 pixels) 1-line output period (3066 pixels) dummy signal (10 pixels) 3100 or more clock pulses are required. clock timing diagram (without s/h mode)
?6 ILX526A input clock voltage condition min. 4.5 0.0 typ. v dd max. 5.5 0.1 unit v v item v ih v il symbol t 1, t 2 min. 0 40 typ. 10 50 max. 100 60 unit ns % item f clk pulse rise/fall time f clk pulse duty * 1 symbol t 5 t 9 t 6, t 8 t 7 min. (1/8) t (1/8) t 0 6 t typ. (1/4) t (1/4) t 10 10 t max. (3/8) t (3/8) t 100 20 t unit ns ns ns ns item f rog, f clkpulse timing 1 f rog, f clkpulse timing 2 f rog pulse rise/fall time f rog pulse period * this is applied to the all external pulses. ( f clk, f rog, f shut) f clk timing (for all modes) t1 t2 t3 t4 f clk * 1 100 t 4/ ( t 3 + t 4) f rog, f clk timing t7 f rog f clk t6 t8 t5 t9 note) t is the period of f clk.
?7 ILX526A f shut, f clk timing symbol t 11, t 13 t 12 t 14 t 15 min. 0 4000 150 150 typ. 10 5000 200 200 max. 100 250 250 unit ns ns ns ns item f shut pulse rise/fall time f shut pulse period f shut, f clk pulse timing 1 f shut, f clk pulse timing 2 f shut f clk t12 t11 t13 t14 t15 f rog, f shut timing symbol t 16, t 17 min. 10 t typ. max. unit ns item f rog, f shut pulse timing f rog f shut t16 t17
?8 ILX526A application circuit (without s/h mode (note)) 12 13 14 15 16 17 18 19 20 21 22 2 3 4 5 6 7 8 9 10 11 1 s/hsw gnd v dd nc nc nc nc nc v out gnd v dd nc t1 v dd gnd f shut f rog nc nc nc f clk vgg f clk f rog f shut 0.01 5v 22/10v 3k w 2sa1175 note) this circuit diagram is the case when internal s/h is not used. application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. symbol t 18 t 19 min. typ. 230 210 max. unit ns ns item f clk-vout output delay time1 f clk-vout output delay time2 f clk t18 vout * 3 vout t19 * 2 * 1 fck = 500khz, f clk duty = 50%, f clk rise/fall time = 10ns * 2 is data period * 3 using internal sample-and-hold circuit f clk-vout timing * 1
?9 ILX526A example of representative characteristics (v dd = 5v, ta = 25?) spectral sensitivity characteristics (standard characteristics) wavelength [nm] 400 500 600 700 800 900 1000 10 9 8 7 6 5 4 3 2 1 0 relative sensitivity dark signal output temperature characteristics (standard characteristics) ta ?ambient temperature [?] ?0 0 10 20 30 40 60 10 5 1 0.5 0.1 0.05 0.01 output voltage rate 50
?10 ILX526A offset level vs. temperature characteristics (standard characteristics) ta ?ambient temperature [?] ?0 4 v os ?offset level [v] d v os d ta ?.1mv/? d v os d v dd 0.49 5 2 3 0 1 0 1020 30405060 offset level vs. v dd characteristics (standard characteristics) v dd [v] 4.5 4 v os ?offset level [v] 5 2 3 0 1 5 5.5 output voltage vs. integration time (standard characteristics) t ?integration time [ms] 10 5 output voltage rate 10 1 50 100 supply current vs. v dd characteristics (standard characteristics) v dd [v] 4.5 12 i vdd ?supply current [ma] 14 6 10 0 4 5 5.5 ta = 25? 8 2 ta = 25?
notes of handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) notes on handling ccd cer-dip packages the following points should be observed when handling and installing cer-dip packages. a) remain within the following limits when applying static load to the ceramic portion of the package: (1) compressive strength: 39n/surface (do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) shearing strength: 29n/surface (3) tensile strength: 29n/surface (4) torsional strength: 0.9nm b) in addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) be aware that any of the following can cause the glass to crack: because the upper and lower ceramic layers are shielded by low-melting glass, (1) applying repetitive bending stress to the external leads. (2) applying heat to the external leads for an extended period of time with soldering iron. (3) rapid cooling or heating. (4) applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) prying the upper or lower ceramic layers away at a support point of the low-melting glass. note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) soldering a) make sure the package temperature does not exceed 80?. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a grounded 30w soldering iron and solder each pin in less then 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an imaging device, do not use a solder suction equipment. when using an electric desoldering tool, ground the controller. for the control system, use a zero cross type. ?11 ILX526A aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa 29n 29n 0.9nm (2) (3) (4) 39n low-melting glass (1) upper ceramic layer lower ceramic layer
?12 ILX526A 4) dust and dirt protection a) operate in clean environments. b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) exposure to high temperatures or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. 6) ccd image sensors are precise optical equipment that should not be subject to mechanical shocks. 7) normal output signal is not obtained immediately after device switch on.
?13 ILX526A package outline unit: mm package structure 1 22 5.0 0.5 h v no.1 pixel 11 12 0?to 9 (at stand off) 0.25 1. the height from the bottom to the sensor surface is 1.61 0.3mm. 2. the thickness of the cover glass is 0.7mm, and the refractive index is 1.5. 32.0 0.5 10.0 0.5 9.0 10.16 4.0 0.5 2.54 0.51 2.7 3.4 0.5 22pin dip (400mil) 21.0 (7m 3000pixels) 5.5 0.8 30.6 package material lead treatment lead material package weight cer-dip tin plating 42 alloy 3.0g m 0.3

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